A Test of a Computer ’ s Floating - Point Arithmetic Unit

ثبت نشده
چکیده

This paper describes a test of a computer's floating-point arithmetic unit. The test has two goals. The first goal deals with the needs of users of computers, and the second goal deals with manufacturers of computers. The first and major goal is to determine if the machine supports a particular mathematical model of computer arithmetic. This model was developed as an aid in the design, analysis, implementation and testing of portable, high-quality numerical software. If a computer supports the arithmetic model, then software written using the model will perform correctly and to specified accuracy on that machine. The second goal of the test is to check that the basic operations perform as the manufacturer intended. For example, if division (x x / / y y) is implemented as a composite operation (x x × (1/ / y y)), then the test should detect that fact. Also, the accuracy lost in such a division due to the extra arithmetic operations can tell the manufacturer whether it has been implemented with sufficient care. Most computers allow the representation of far too many floating-point numbers to allow exhaustive testing of the floating-point arithmetic unit. A small and well-motivated set of floating-point numbers is presented that can be used to detect a vast number of floating-point arithmetic "problems" in existing machines. In fact, that set can be used to detect at least one instance of every floating-point arithmetic problem known to the author. The test is written in portable FORTRAN and has been run on seven different vendor's hardware, with results that range from perfection to disaster.

برای دانلود رایگان متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

ASIC Design of Butterfly Unit Based on Non-Redundant and Redundant Algorithm

Fast Fourier Transform (FFT) processors employed with pipeline architecture consist of series of Processing Elements (PE) or Butterfly Units (BU). BU or PE of FFT performs multiplication and addition on complex numbers. This paper proposes a single BU to compute radix-2, 8 point FFT in the time domain as well as frequency domain by replacing a series of PEs. This BU comprises of fused floating ...

متن کامل

Verification of All Circuits in a Floating-Point Unit Using Word-Level Model Checking

1 I n t r o d u c t i o n The floating-point division flaw [SB94, Coe95] in Intel Corp.'s Pentium underscores howhard the task of verifying a floating-point arithmetic unit is, and how high the cost of a floating-point arithmetic bug can be. About one trillion test vectors were used and none uncovered the bug. The recall and replacement of the chips in the field cost Intel $470 million. Since t...

متن کامل

FPGA Based Quadruple Precision Floating Point Arithmetic for Scientific Computations

In this project we explore the capability and flexibility of FPGA solutions in a sense to accelerate scientific computing applications which require very high precision arithmetic, based on IEEE 754 standard 128-bit floating-point number representations. Field Programmable Gate Arrays (FPGA) is increasingly being used to design high end computationally intense microprocessors capable of handlin...

متن کامل

Reducing Latency, Power, and Gate Count with the Tensilica Floating-Point FMA

Today’s digital signal processing applications such as radar, echo cancellation, and image processing are demanding more dynamic range and computation accuracy. Floating-point arithmetic units offer better precision, higher dynamic range, and shorter development cycles when compared to fixed-point arithmetic units. Minimizing the design’s time to market is more important than ever. Algorithm de...

متن کامل

Architectural Design of 8 Bit Floating Point Multiplication Unit

In the recent high speed processor, floating point ALU (FP ALU) is one of the important units to perform the arithmetic and logical functions of the floating point number. Floating point multiplication is one of the arithmetic operations that take more computational time and when implemented in hardware, it requires more area due to the large number of component. However the advantage of implem...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 1981